The Snowbush IP Multi-Standard SerDes utilizes proprietary hybrid analog/digital architecture offering low power, compact area, yet robust performance over a range of process, voltage, and temperature variations. The SerDes was designed to exceed key electrical specifications for targeted standards, including transmit jitter and jitter tolerance, for robust performance in challenging SoC environments.

The highly programmable nature of the SerDes enables designers to configure parameters such as transmit driver amplitude, pre-emphasis, and slew rate, as well as receiver equalization to match the requirements of the channel - including communications over cables, a few inches of PCB (chip-to-chip), or over long lossy backplanes with connectors. Snowbush Multi-Standard SerDes also features highly scalable power consumption, and sophisticated power management modes for ultra low-power operation. The SerDes also includes various testability and diagnostic features including BIST, 7 internal loop-back modes, on-chip pattern generator and checkers supporting both user-defined and industry-standard PRBS data patterns, as well as a digital diagnostic buss.