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DESIGN SERVICES
Our Business Model
Process Experience
Experienced at taping out to multiple foundries across a broad range of processes:
  • All process nodes from 130nm to 45nm
  • TSMC, UMC, Samsung, SMIC, Fujitsu and IBM
Applications Experience
  • Multiple Gigabit designs
  • Low phase noise/low jitter designs
  • PHY Layer designs
  • ADC/DACs, VGAs, Regulators, etc.
  • SerDes
  • OFDM-based data communications
  • Hard disk drive and other data storage
Downloadables

Overview

Our Physical Design Center based in Aguascalientes, Mexico combines Snowbush’s extensive expertise in full custom analog/digital IC layout with the cost-effectiveness of an offshore design center, and the real-time access of a team based in North America.

We have worked closely and successfully with a variety of semiconductor companies, from large market leaders looking to supplement their own physical design capabilities to start-ups looking for a physical design team as they ramp up development of their cutting-edge SoC products.

Our business model is to provide our clients with superior service with state-of-the-art professional design capabilities. We are strongly committed to our clients’ schedules and deadlines.

Services

We offer:
  • Analog and full custom digital layout from single cell design to an entire chip integration
  • Related physical design verification (DRC, LVS, EM analysis, antenna checks, etc.)
  • Encompassing abstract creation, new layout, ports, post layout extractions, P&R merges, EM fixes and other changes to analog blocks

Value Proposition

Our physical design services are focused on delivering complex, customized digital and analog front-ends in deep sub-micron CMOS. We can deliver finished layout directly into the customer’s design environment, and work as an extension of customer’s own design team. Alternatively we can leverage Snowbush’s advanced physical design and tool flow to deliver finished GDSII.

Our physical design team is composed of highly qualified Electrical Engineers with deep understanding of advanced layout techniques. This allows them to address issues that are not detected by most verification tools, such as proximity effects, mechanical stress, electromigration and other DFM and reliability problems. Our vast knowledge of design specific requirements such as device and signal matching, load balancing, cross talk reduction and shielding techniques has enabled us to provide our customers with area and power efficient robust designs.

In today’s highly competitive semiconductor industry, high quality and punctual delivery go hand in hand. We have a documented history of delivering on time. We appreciate our customers’ changing needs for physical design, and we adjust to those needs while maintaining a high level of productivity.

Competitive Advantages

  • Wealth of expertise and proven track record in delivering full custom analog layout in the state-of-the-art technologies for mass production
  • Strong analog design team. Unique to the physical design industry, all of our design staff hold a Bachelor or higher degree in Electrical Engineering and are fully bilingual in English and Spanish
  • Very competitive fees
  • US Central Time Zone (Convenient real-time access to physical design engineers for analog IC designers and chip integrators based in North America)
  • North American calling numbers (no international long distance charges)
  • High-speed internet linked to North American networks enabling NetMeeting™, LiveMeeting™, Webex™, or other web conferencing tools
  • Formalized and highly detailed project management techniques
  • Flexible business model

Confidentiality

We are committed to maintaining the security and confidentiality of customer information.
  • We have a non disclosure agreement with the customer and we respect customer’s IPs.
  • Access to customer’s information is password protected and logged.
  • Design tasks may be performed directly on customer’s servers using site-to-site VPN if preferred. Alternatively, the computers for contract layout services will not be connected to LAN or have shared directories with other computers.

Quality Assurance

  • Snowbush assigns a dedicated liaison engineer in Toronto to ensure customer’s flow and design issues are fully and conveniently incorporated into the design flow, hence further reducing customer’s supervision/management time.
  • Snowbush maintains a close interaction between layout engineers and IC designers throughout the project.
  • Together with customer we commit to a deadline for completion of work, identify schedule risks and area commitment.
  • Design team holds weekly meetings and provides weekly (or more frequently if need be) progress reports.
  • All designs undergo the extensive pre and post-layout checklists (Snowbush’s, and customer’s if applicable).
Contact Information

Venustiano Carranza 122 int. 1
Centro, Aguascalientes
MEXICO 20000
Tel: +1-416-848-0328

Email:sbmx@snowbush.com