PCIe & SATA PHYs Multi -Standard SerDes Data Converters PLL & Clocks Video & Graphics Other IP Licensing our IP Cores
Why choose our IP cores?
- Robust performance
- Comprehensive deliverables
- Flexible licensing terms
- Superior service and support
Video & Graphics
Snowbush's first design in 1998 was a triple ADC for graphics digitization and we have been designing high performance ADCs, line-lock PLLs and graphics digitization AFEs ever since. All our video and graphics IP come with flexible licensing terms and are backed by our unique commitment to design support for integration, customization and development of complementary circuit blocks.Snowbush video/graphics digitization IP offer several key technical features and advantages:
- Automatic calibration of key analog elements to minimize the effects of process variations and maximize yield
- On-chip LDO regulators to increase noise immunity to power-supply and substrate noise
- Accessible register controls to allow user-specific optimization of critical core parameters
AFEs
10-205MHz video/graphic digitizer AFE Contact Us
0.18μm
0.18μm
Triple 8-bit ADC, line-lock PLL and other front-end blocks provide digitization up to UXGA (1600x1200 at 75Hz) resolution.
Silicon Proven
Part #:
SBVGA1000T180
SBVGA1000T180
ADCs
10-Bit 100/150 MSPS Datasheet
0.18μm
0.18μm
1.8V Pipe-line ADC combines excellent dynamic performance, compact area and low power. Operates from 10Msps to 140+Msps.
Silicon Proven
Part #:
SBADC2000U180
SBADC2000U180
8-Bit, 205Msps ADC Datasheet
0.18μm
0.18μm
3.3/ 1.8V ADC converter designed to achieve 7.0 ENOB. Single or multiple channel configurations.
Silicon Proven
Part #:
SBADC1200T180
SBADC1200T180
8-bit, 150Msps ADC Contact Us
0.35μm
0.35μm
3.3V ADC converter achieves SNR of 45dB at 50MHz while dissipating only 250mW.
Silicon Proven
Part #:
SBADC1000T350
SBADC1000T350
Line-Lock PLLs
- Analog fractional synthesizer core proven in numerous technologies
- Dual-loop highly digital approach with on-chip filters offers excellent jitter at all pixel rates
Line-Lock PLL Contact Us
65nm
65nm
Video and graphics lock to HSYNC.
IP Ready
Part #:
SBLLP2000T65G
SBLLP2000T65G
Line-Lock PLL Datasheet
80nm
80nm
Video and graphics lock to HSYNC.
Silicon Proven
Part #:
SBLLP2000T80G
SBLLP2000T80G
Line-lock jitter histogram for a 162 MHz pixel clock, with a 75 kHz Hsync (VXGA 1600x1200) and a 60Hz refresh rate for the SBVGA1000T180